“With years of semiconductor experience, our management team is positioned and ready to serve IDM and fabless customers with high quality feature rich process solutions. We are eager to understand customer wants and needs and create value for them through innovation, efficient processes and kept commitments.”
– Guy Eristoff
About Guy Eristoff
Mr. Eristoff was appointed Chief Executive Officer of TPSCo at the time of its founding in April 2014. Previously he was Vice President, Global Operational Excellence at TowerJazz.
Prior to this, he served in various positions in the semiconductor industry such as Director of 200mm Fabs Core Engineering at GLOBALFOUNDRIES (Technology Development, Marketing, Industrial Engineering & Central Engineering) for the 200mm Business Unit, (5 fabs); General Manager, Singapore and Asia Region at Intevac; Thin Films Section Manager, Thin Films Module Manager and Process Integration Deputy Director at Chartered Semiconductor; and Process/Hardware Engineer and Field Service Manager at Applied Materials.
Mr. Eristoff received his B.S. degree in Physics from Rensselaer Polytechnic Institute, (RPI) Troy New York.
About Yoshihisa Nagano
Prior to this, Mr. Nagano served with Matsushita Electric Industrial Co., Ltd., Kyoto, Japan since 1991 where he was engaged in the development of integrated ferroelectric memory devices and was Manager of the Integrated NVRAM Development Section. He was also Manager and General Manager of the Wafer Production Fab since 2009.
Mr. Nagano received his B.S. and M.S. degree in Electrical Engineering from Osaka University, Osaka, Japan, in 1989 and 1991, respectively.
About Amit Mappa
Prior to this, Mr. Mappa served in various finance and business development positions with several multinational corporations, including CFO, Asia Pacific for Netafim Ltd., where he secured the funding required for the company’s fast growing Asian operation. He also served as Finance Manager at the international division of Comverse Inc., and as Treasury and Investor Relations Manager at Acer Latin America Inc., where he held an active role in the company’s IPO.
Mr. Mappa is a licensed CPA (Massachusetts, US), he holds a B.S. degree in Finance from Florida State University and an executive MBA degree with specialization in Financial Engineering from The Hebrew University of Jerusalem.
About Tomoyuki Sasaki
He led the 300mm Fab start-up in Uozu and developed CMOS processes from 65nm down to 32nm, which offered the world’s first manufacturable “Gate First” High-k/Metal gate technology. He also led frontside illumination image sensors with light pipe technology, RF GaAs technology, and many others.
He joined Matsushita Electric Industrial Co., Ltd. in 1987 where he contributed a great deal of new process development through his remarkable dry etching expertise.
Mr. Sasaki received his B.S. degree in Chemistry from Kyoto University, Kyoto, Japan in1987.